Coming soonIntermediate
Verilog
Describe hardware in code, from your first module to clean, synthesizable RTL with a testbench to prove it works.
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Verilog is how most digital hardware gets written. This track starts from the basics and builds up to RTL you could hand to a synthesis tool, with a testbench for every step.
Lessons
- 1Why hardware description languages existComing soon
- 2Modules, ports and wiresComing soon
- 3Data types and operatorsComing soon
- 4Combinational logic with assign and alwaysComing soon
- 5Sequential logic and non-blocking assignmentsComing soon
- 6Writing a testbenchComing soon
- 7Simulating and reading waveformsComing soon
- 8Writing synthesizable RTLComing soon